Dr. J.S. Ubhi
Electronics & Communication Engineering
– Ph. D. in Electronics and Communication Engg. from Punjab Technical University, Jalandhar in January, 2011
– M.E (with honours) from Thapar Institute of Engg. & Technology, Patiala in 2000.
– B.E. in Electronics & Communication Engineering from Thapar Institute of Engg. & Technology, Patiala in 1994.
Teaching experience of 29 years.
“Real Time Object Tracking: Simulation and Implementation on FPGA based Soft Processor”, Book Chapter, Quality, Reliability, Security and Robustness in Heterogeneous Networks, published by Springer,
“Deep learning for obstacle avoidance in autonomous driving” Book Chapter in Autonomous Driving and Driver Assistance System (CRC press), Taylor & Francis ISBN9781003048381, 2021.
“Current Advancements of Steganography in Spatial Domain” Book Chapter in Modelling & optimization of Signals using Machine Learning Techniques (Scrivener Publishing- Wiley), 2021.
“Leakage Reduction in Full Adder Circuit Using Source Biasing at 45 nm Technology” Advances in Signal Processing and Communication. Lecture Notes in Electrical Engineering, vol 526. Springer, Singapore, ISBN 978-981.
• Fellow, The Institution of Engineers (India).
• Fellow, Indian Society of Systems for Science and Engineering (ISSE)
• Member, Institute of Electrical and Electronics Engineers (IEEE)
• Member, Institution of Electronics and Telecommunication Engineers.
• Member, International Association of Engineers.
• Best Paper Award : 01
• Invited Talks Delivered : 24
• Session Chaired:
Chairperson in the 2011 International Conference of Signal and Image Engineering under the aegis of World Congress on Engineering 2011 (WCE 2011), organized by the International Association of Engineers (IAENG) at the South Kensington Campus, Imperial College, London, UK on July 6-8, 2011.
(a) Research Projects: 02
(1) Funding Agency : Ministry of Electronics and Information Technology (Meity), New Delhi
Amount: Rs. 90.88 lacs
(2) Funding Agency : Science and Engineering Research Board (SERB)
Amount: Rs. 2322609/- (Rs. Twenty Three Lakh Twenty Two Thousand Six Hundred and Nine Only)
(b) MODROB Project: 01
· Principal investigator in MHRD project titled “Modernization and Up gradation of Microprocessor Lab” sanctioned for Rs. 15 lacs.
Areas of Interest:
(a) Low power VLSI Design
(b) RF Energy Harvesting
(c) Wireless Communication
· PhD guided = 05
· M.Tech students guided = 21
· PhD under supervision = 02
Research Papers: (Total: 65)
(a) Papers in National and International Journals: 32
(b) Book Chapters: 06
(c) Papers in National & International Conferences: 27
(a) CMOS Design and Process Technology, Semi-Conductor Laboratory (SCL), Mohali, December 21, 2015 to January 4, 2016.
(b) CMOS Process Integration and Fabrication Techniques, Semi-Conductor Laboratory (SCL), Mohali, June 06, 2016 to July 05, 2016.
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